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Data Sheet AS1100
Serially Interfaced, 8-Digit LED Driver
AS1100
Key Features
-
DATA SHEET
10MHz Serial Interface Individual LED Segment Control Decode/No-Decode Digit Selection 20A Low-Power Shutdown (Data Retained) Extremely low Operating Current 0.5mA in open loop Digital and Analog Brightness Control Display Blanked on Power-Up Drive Common-Cathode LED Display Software Reset 1 Optional External clock 24-Pin DIP and SO Packages Fully compatible to MAX7219
Every individual segment can be addressed and updated separately. Only one external resistor is required to set the current through the LED display. Brightness can be controlled either in an analog or digital way. The user can choose the internal code-B decoder to display numeric digits or to address each segment directly. The AS1100 features an extremely low shutdown current of only 20A. and an operational current of less than 500A. The number of visible digits can be programmed as well. The AS1100 can be reset by software and an external clock can be used. Several test modes support easy debugging. The AS1100 is fully compatible to the MAX 7219. AS1100 is offered in a 24 pins PDIP and SOIC package.
General Description
The AS1100 is an LED driver for 7 segment numeric displays of up to 8 digits. The AS1100 can be programmed via a conventional 4 wire serial interface. It includes a BCD code-B decoder, a multiplex scan circuitry, segment and display drivers and a 64 Bit memory. The memory is used to store the LED settings, so that continuous reprogramming is not necessary.
Applications
-
Bar-Graph Displays Industrial Controllers Panel Meters LED Matrix Displays White Goods
TOP
DIN DIG0 DIG4 GND DIG6 DIG2 DIG3 DIG7 GND DIG5 DIG1
1 2 3 4 5 6 7 8 9 10 11
24 23 22 21 20 19
DOUT SEG D SEG DP SEG E SEG C VDD ISET SEG G SEG B SEG F SEG A CLK
9.53k
18 1 12 1 9
+5V 19 VDD ISET DIN LOAD CLK SEG A-G SEP DP GND GND 4 DIG0-DIG7 8 Digits
AS1100
18 17 16 15 14 13
MOSI P I/O SCK
8 Segments
LOAD 12
DIP/SO 24 Pin Configuration
8-Digit P Display
Typical Application Circuit
1
Software Reset and external clock are not supported by MAX7219
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Data Sheet AS1100
Absolute Maximum Ratings
Voltage (with respect to GND) VDD DIN, CLK, LOAD All Other Pins Current DIG0-DIG7 Sink Current SEGA-G, DP Source Current Continuous Power Dissipation (TA = +85C) Narrow Plastic DIP (derate 13.3mW/C above +70C Wide SO (derate 11.8mW/C above +70C) Operating Temperature Ranges (TMIN to TMAX) AS1100xL AS1100xE Storage Temperature Range Package body temperature 2 -0.3V to 6V -0.3V to 6V -0.3V to (VDD +0.3V)
500mA 100mA
1066mW 941mW
0C to +70C -40C to +85C -65C to +150C +240C
Electrical Characteristics
(VDD = 5V, RSET = 9.53k1%, TA = TMIN to TMAX, unless otherwise noted.) Symbol Conditions VDD All digital inputs at VDD or GND, TA = Shutdown Supply Current IDDSD +25C RSET = open circuit Operating Supply Current IDD All segments and decimal point on, ISEG = 40mA Display Scan Rate fOSC 8 digits scanned Digit Drive Sink Current IDIGIT VOUT = 0.65V Segment Drive Source Current ISEG TA = +25C, VOUT = (VDD -1V) Segment Drive Current ISEG Matching Digit Drive Source Current IDIGIT Digit off, VDIGIT = (VDD -0.3V) Segment Drive Sink Current ISEG Segment off, VSEG = 0.3V Logic Inputs Parameter Operating Supply Voltage Min 4.0 Typ 5.0 20 Max 5.5 50 500 330 500 320 -30 800 -40 3.0 -2 5 1300 -45 Units V A A mA Hz mA mA % mA mA
2
The reflow peak soldering temperature (body temperature) is specified according IPC/JEDEC J-STD-020B "Moisture/Reflow Sensitivity Classification for non-hermetic Solid State Surface Mount Devices".
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Data Sheet AS1100
Parameter Symbol Conditions Input Current DIN, CLK, LOAD IIH, IIL VIN = 0V or VDD Logic High Input Voltage VIH Logic Low Input Voltage VIL Output High Voltage VOH DOUT, ISOURCE = -1mA Output Low Voltage VOL DOUT, ISINK = 1.6mA Hysteresis Voltage VI DIN, CLK, LOAD Timing Characteristics CLK Clock Period tCP CLK Pulse Width High tCH CLK Pulse Width Low tCL CLK Rise to LOAD Rise Hold tCSH Time DIN Setup Time tDS DIN Hold Time tDH Output Data Propagation Delay tDO CLOAD = 50pF LOAD Rising Edge to Next tLDCK Clock Rising Edge Minimum LOAD Pulse High tCSW Data-to-Segment Delay tDSPD
Min -1 3.5 VDD - 1
Typ
Max 1 0.8 0.4
1 100 50 50 0 25 0 25 50 50 2.25
Units A V V V V V ns ns ns ns ns ns ns ns ns ms
Pin Description
Pin 1 2, 3, 5-8, 10, 11 4, 9 12 13 14-17, 20-23 18 19 24 Name DIN Function Data input. Data is programmed into the 16Bit shift register on the rising CLK edge 8 digit driver lines that sink the current from the common cathode of the display. DIG 0-DIG 7 In shutdown mode the AS1100 switches the outputs to VDD GND both GND pins must be connected Strobe input. With the rising edge of the LOAD signal the 16 bit of serial data is latched into LOAD the register. Clock input. The interface is capable to support clock frequencies up to 10MHz. The serial CLK data is clocked into the internal shift register with the rising edge of the CLK signal. On the DOUT pin the data is applied with the falling edge of CLK. SEG A-G, Seven segment driver lines including the decimal point. When a segment is turned off the DP output is connected to GND. The current into ISET determines the peak current through the segments and therefore the ISET brightness. VDD Positive Supply Voltage (+5V) Serial data output for cascading drivers. The output is valid after 16.5 clock cycles. The DOUT output is never set to high impedance.
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Data Sheet AS1100
LOAD
tCSW tCS tCL tCH tCP tLDCK
CLK
tDH tDS
DIN D15 D14 D1 D0
tDO
DOUT
Figure 1: Timing diagram
D15 D14 D13 D12 D11 D10 D9 X X X X Address
Table 1: Serial data format (16 bits)
D8
D7 D6 MSB
D5
D4 D3 Data
D2
D1
D0 LSB
Detailed Description
Serial-Addressing Modes Programming of the AS1100 is done via the 4 wire serial interface. A programming sequence consists of 16-bit packages. The data is shifted into the internal 16 Bit register with the rising edge of the CLK signal. With the rising edge of the LOAD signal the data is latched into a digital or control register depending on the address. The LOAD signal must go to high after the 16 th rising clock edge. The LOAD signal can also come later but just before the next rising edge of CLK, otherwise data would be lost. The content of the internal shift register is applied 16.5 clock cycles later to the DOUT pin. The data is clocked out at the falling edge of CLK. The Bits of the 16Bitprogramming package are described in table 1. The first 4 Bits D15-D12 are "don't care, D11-D8 contain the address and D7-D0 contain the data. The first bit is D15, the most significant bit (MSB). The exact timing is given in figure 1. Digit and Control Registers The AS1100 incorporates 15 registers, which are listed in Table 2. The digit and control registers are selected via the 4Bit address word. The 8 digit registers are realized with a
64bit memory. Each digit can be controlled directly without rewriting the whole contents. The control registers consist of decode mode, display intensity, number of scanned digits, shutdown, display test and reset/external clock register. Shutdown Mode The AS1100 features a shutdown mode, where it consumes only 20A current. The shutdown mode is entered via a write to register 0Ch. Then all segment current sources are pulled to ground and all digit drivers are connected to VDD, so that nothing is displayed. All internal digit registers keep the programmed values. The shutdown mode can either be used for power saving or for generating a flashing display by repeatedly entering and leaving the shutdown mode. The AS1100 needs typically 250s to exit the shutdown mode. During shutdown the AS1100 is fully programmable. Only the display test function overrides the shutdown mode. Initial Power-Up After powering up the system all register are reset, so that the display is blank. The AS1100 starts the shutdown mode. All registers should be programmed for normal operation. The default settings enable only scan of one digit, the internal decoder is disabled, data register and intensity register are set to the minimum value.
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Data Sheet AS1100
Decode-Mode Register In the AS1100 a BCD decoder is included. Every digit can be selected via register 09h to be decoded. The BCD code consists of the numbers 0-9, E,H, L,P and -. In register 09h a logic high enables the decoder for the appropriate digit. In case that the decoder is bypassed (logic low) the data Bits D7-D0 correspond to the segment lines of the AS1100. In table 4 some possible settings for register 09h are shown. Bit D7, which corresponds to the decimal point, is not affected by the settings of the decoder. Logic high means that the decimal point is displayed. In table 5 the font of the Code B decoder is shown. In table 6 the correspondence of the register to the appropriate segments of a 7 segment display is shown (see figure 2) Intensity Control and Interdigit Blanking Brightness of the display can be controlled in an analog way by changing the external resistor (RSET). The current, which flows between VDD and ISET, defines the current that flows through the LEDs. The LED current is 100 times the ISET current. The minimum value of RSET should be 9.53k, which corresponds to 40mA segment current. The brightness of the display can also be controlled digitally via register 0Ah. The brightness can be programmed in 16 steps and is shown in table 7. An internal pulse width modulator controls the intensity of the display. Scan-Limit Register The scan limit register 0Bh selects the number of digits displayed. When all 8 digits are displayed the update frequency is typically 800Hz. If the number of digits displayed is reduced, the update frequency is reduced as well. The frequency can be calculated using 8fOSC/N, where N is the number of digits. Since the number of displayed digits influences the brightness, the resistor RSET should be adjusted accordingly. Table 9 shows the maximum allowed current, when fewer than 4 digits are
used. To avoid differences in brightness the scan limit register should not be used to blank portions of the display (leading zeros). Address D15-D12 D11 D10 X 0 0 X 0 0 X 0 0 X 0 0 X 0 1 X 0 1 X 0 1 X 0 1 X 1 0 X X X X X X X 1 1 1 1 1 1 1 0 0 0 1 1 1 1 Hex Code 0xX0 0xX1 0xX2 0xX3 0xX4 0xX5 0xX6 0xX7 0xX8 0xX9 0xXA 0xXB 0xXC 0xXD 0xXE 0xXF
Register No-Op Digit 0 Digit 1 Digit 2 Digit 3 Digit 4 Digit 5 Digit 6 Digit 7 Decode Mode Intensity Scan Limit Shutdown Not used Reset and ext. Clock Display Test
D9 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
D8 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Table 2: Register address map
Mode Shutdown Mode Normal Operation
Address Code Register Data D7 D6 D5 D4 D3 D2 D1 D0 (Hex) 0xXC 0xXC X X X X X X X X X X X X X X 0 1
Table 3: Shutdown register format (address (hex) = 0xXC)
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Data Sheet AS1100
Decode Mode No decode for digits 7-0 Code B decode for digit 0 No decode for digits 7-1 Code B decode for digits 3-0 No decode for digits 7-4 Code B decode for digits 7-0
D7 0 0
D6 0 0
D5 0 0
Register Data D4 D3 D2 0 0 0 0 0 0
D1 0 0
D0 0 1
Hex Code 0x00 0x01
0 1
0 1
0 1
0 1
1 1
1 1
1 1
1 1
0x0F 0xFF
Table 4: Decode-mode register examples (address (hex) = 0xX9)
7-Segment Character 0 1 2 3 4 5 6 7 8 9 -- E H L P blank
Table 5: Code B font
Register Data D7* D6-D4 X X X X X X X X X X X X X X X X D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 DP* A 1 0 1 1 0 1 1 1 1 1 0 1 0 0 1 0
On Segments = 1 B 1 1 1 1 1 0 0 1 1 1 0 0 1 0 1 0 C 1 1 0 1 1 1 1 1 1 1 0 0 1 0 0 0 D 1 0 1 1 0 1 1 0 1 1 0 1 0 1 0 0 E 1 0 1 0 0 0 1 0 1 0 0 1 1 1 1 0 F 1 0 0 0 1 1 1 0 1 1 0 1 1 1 1 0 G 0 0 1 1 1 1 1 0 1 1 1 1 1 0 1 0
*The decimal point is set by bit D7 = 1
D7 Corresponding Segment Line DP
D6 A
Register Data D5 D4 D3 D2 B C D E
D1 F
D0 G
Table 6: No-decode mode data bits and corresponding segment lines
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Data Sheet AS1100
A F B
G
E D
C DP
Figure 2: Standard 7-segment LED
Duty Cycle 1/32 (min on) 3/32 5/32 7/32 9/32 11/32 13/32 15/32 17/32 19/32 21/32 23/32 25/32 27/32 29/32 31/32 (max on)
D7 X X X X X X X X X X X X X X X X
D6 X X X X X X X X X X X X X X X X
D5 X X X X X X X X X X X X X X X X
D4 X X X X X X X X X X X X X X X X
D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
D0 Hex Code 0 0xX0 1 0xX1 0 0xX2 1 0xX3 0 0xX4 1 0xX5 0 0xX6 1 0xX7 0 0xX8 1 0xX9 0 0xXA 1 0xXB 0 0xXC 1 0xXD 0 0xXE 1 0xXF
Table 7: Intensity register format (address (hex) = 0xXA)
Scan Limit
Display Display Display Display Display Display Display 6 Display digits 0 1 2 3 4 5 67
D7 digit 0 only X digits 0 & 1 X digits 0 1 2 X digits 0 1 2 3 X digits 0 1 2 3 4 X digits 0 1 2 3 4 5 X digits 0 1 2 3 4 5 X X
D6 X X X X X X X X
D5 X X X X X X X X
Register Data D4 D3 D2 X X 0 X X 0 X X 0 X X 0 X X 1 X X 1 X X X X 1 1
D1 0 0 1 1 0 0 1 1
D0 0 1 0 1 0 1 0 1
Hex Code 0xX0 0xX1 0xX2 0xX3 0xX4 0xX5 0xX6 0xX7
Table 8: Scan-limit register format (address (hex) = 0xXB)
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Data Sheet AS1100
Display Test Register With the display test register 0Fh all LED can be tested. In the test mode all LEDs are switched on at maximum brightness (duty cycle 31/32). All programming of digit and control registers is maintained. The format of the register is given in table 10. Number of Digits Displayed 1 2 3 Maximum Segment Current (mA) 10 20 30
Mode Normal Operation, internal clock Normal Operation, external clock Reset state, internal clock Reset state, external clock
Address Register Data code (hex) D7 D6 D5 D4 D3 D2 D1 D0 0xXE 0xXE 0xXE 0xXE X X X X X X X X X X X X X X X X X X X X X X X X 0 0 1 1 0 1 0 1
Table 11: Reset and external Clock register (address (hex) = 0xXE)
Table 9: Maximum segment current for 1-, 2-, or 3-digit displays
Register Data Mode D7 D6 D5 D4 D3 D2 D1 D0 Normal Operation X X X X X X X 0 Display Test XXXXXXX 1 Mode
Table 10: Display-test register format (address (hex) = 0xXF)
Applications Information
Supply Bypassing and Wiring In order to achieve optimal performance the AS1100 shall be placed very close to the LED display to minimize effects of electromagnetic interference and wiring inductance. Furthermore it is recommended to connect a 10F electrolytic and a 0.1F ceramic capacitor between VDD and GND to avoid power supply ripple. Also, both GNDs must be connected to ground. Selecting RSET Resistor and Using External Drivers The current through the segments is controlled via the external resistor RSET. Segment current is about 100 times the current in ISET. The right values for ISET are given in table 12. The maximum current the AS1100 can drive is 40mA. If higher currents are needed, external drivers must be used. In that case it is no longer necessary that the AS1100 drives high currents. A recommended value for RSET is 47k. In cases that the AS1100 only drives few digits table 9 specifies the maximum currents and RSET must be set accordingly. Refer to absolute maximum ratings to calculate acceptable limits for ambient temperature, segment current, and the LED forward-voltage drop. VLED (V) 2.5 11.0 15.8 25.9 59.3
Note: The AS1100 remains in display-test mode until the display-test register is reconfigured for normal operation. No-Op Register (Cascading of As1100) The no-operation register 00h is used when AS1100s are cascaded in order to support more than 8 digit displays. The cascading must be done in a way that all DOUT are connected to DIN of the following AS1100. The LOAD and CLK signals are connected to all devices. For a write operation for example to the fifth device the command must be followed by four no-operation commands. When the LOAD signal finally goes to high all shift registers are latched. The first four devices have got no-operation commands and only the fifth device sees the intended command and updates its register. Reset and external Clock Register 3 This register is addressed via the serial interface. It allows to switch the device to external clock mode (If D0=1 the CLK pin of the serial interface operates as system clock input.) and to apply an external reset (D1). This brings all registers (except reg. E) to default state. For standard operation the register contents should be "00h".
ISEG (mA) 40 30 20 10
1.5 12.2 17.8 29.8 66.7
2.0 11.8 17.1 28.0 63.7
3.0 10.6 15.0 24.5 55.4
3.5 9.69 14.0 22.6 51.2
Table 12: RSET vs. segment current and LED forward voltage
3
This register is not used by MAX7219, since it does not support software reset and external clocks
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Data Sheet AS1100
8x8 LED Dot Matrix Driver
The example in Figure 3 uses the AS1100 to drive an 8x8 LED dot matrix. The LED columns have common cathode and are connected to the DIG0-7 outputs. The rows are connected to the segment drivers. Each of the 64 LEDs can be addressed separately. The columns are selected via the digits as shown in Table 2. The decode mode register (0xX9) has to be programmed to `00000000' as stated in Table 4. The single LEDs in a column can be addressed as stated in Table 6, where D0 corresponds to segment G and d/ to segment DP. For a multiple digit dot matrix several AS1100 have to be cascaded.
Diode Arrangement
SEG G SEG F SEG E SEG D SEG C SEG B SEG A SEG DP DIG 0
8x8 LED Dot M ti
SEG G SEG F SEG E SEG D SEG C SEG B SEG A SEG DP DIG 7 DIG 0 SEG A-G DIG 0SEP DP 1 12 DIN LOA CLK GND GND 4
8x8 LED Dot M ti
DIG 7
P
SEG A-G DIG 024 DOUT SEP DP 19 1 VDD DIN 12 LOA 1 CLK 18 9 GND GND ISET 4
VBAT
VDD
19
VBAT
9.53k
1 9
ISET
18
9.53k
Figure 3: Application example as LED dot matrix driver
Cascading Drivers The AS1100 can be cascaded as well. The DOUT pin must be connected to the DIN pin of the following AS1100. Thermal Resistance ( JA) Package 24 Narrow DIP +75C/W 24 Wide SO +85C/W Maximum Junction Temperature (TJ) = +150C Maximum Ambient Temperature (TA) = +85C
Table 13: Package thermal resistance data
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Data Sheet AS1100
Computing Power Dissipation The upper limit for power dissipation (PD) for the AS1100 is determined from the following equation: PD = (VDD x 0.5mA) + (VDD - VLED)(DUTY x ISEG x N) where: VDD = supply voltage DUTY = duty cycle set by intensity register N = number of segments driven (worst case is 8) VLED = LED forward voltage ISEG = segment current set by RSET Dissipation Example: ISEG = 40mA, N = 8, DUTY = 31/32, VLED = 1.8V at 40mA, VDD = 5.25V PD = 5.25V(0.5mA) + (5.25V - 1.8V)(31/32 x 40mA x 8) = 1.07W Thus, for a PDIP package JA = +75C/W (from Table 13), the maximum allowed ambient temperature TA is given by: TJ,MAX = TA + PD x JA = 150C = TA +1.07W x 75C/W. where TA = +69.7C. The TA limit for SO Packages in the dissipation example above is +59.0C.
Package Information
Dim A A1 B C D e E H L
Inches Min Max 0.093 0.104 0.004 0.012 0.014 0.019 0.009 0.013 0.598 0.614 0.050 0.291 0.299 0.394 0.419 0.016 0.050
Millimeters Min Max 2.35 2.65 0.10 0.30 0.35 0.49 0.23 0.32 15.20 15.60 1.27 7.40 7.60 10.00 10.65 0.40 1.27
Figure 4: SOIC-24 package dimensions
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Data Sheet AS1100
Inches Dim Min Max A --0.180 A1 0.015 --A2 0.125 .0175 A3 0.055 0.080 B 0.015 0.022 B1 0.045 0.065 C 0.008 0.014 D 1.140 1.265 D1 0.005 0.080 E 0.300 0.325 E1 0.240 0.310 e 0.100 BSC eA 0.300 BSC eB 0.400 BSC L 0.115 0.150
Millimeters Min Max --4.572 0.380 --3.180 4.450 1.400 2.030 0.381 0.560 1.140 1.650 0.200 0.355 28.96 32.13 0.130 2.030 7.620 8.260 6.100 7.870 2.54 BSC. 7.62 BSC. 10.2 BSC. 2.921 3.810
Figure 5: PDIP-24 package dimensions
Segment Driver Capability, VDD = 5V, Logic Level = High 50 Upper Limit
45
40
35 Segment Current in mA Lower Limit
30
25
20
15
10
5
0
0
0.5
1
1.5 2 2.5 3 Voltage below VDD at output in V
3.5
4
4.5
Figure 6: Segment driver capability
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Data Sheet AS1100
Segment Current = f(RSET) 50
45
40
35
ISEGMENT in mA
30
25
20
15
10
5
0
10
1
10 RSET in kOhm
2
Figure 7: Segment Current versa RSET
Ordering Information
Pin Package AS1100PL 0C to +70C 24 Narrow Plastic DIP AS1100WL 0C to +70C 24 Wide SO AS1100PE -40C to +85C 24 Narrow Plastic DIP AS1100WE -40C to +85C 24 Wide SO AS1100WL-T 0C to +70C 24 Wide SO AS1100WE-T -40C to +85C 24 Wide SO For Pb-free package use suffix `-Z` Part Temp Range Delivery Form Tubes Tubes Tubes Tubes T&R T&R
Copyright
Copyright (c) 2004 austriamicrosystems. Trademarks registered (R). All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. To the best of its knowledge, austriamicrosystems asserts that the information contained in this publication is accurate and correct.
Austriamicrosystems reserves the right to change the circuitry and specifications without notice at any time.
Contact
austriamicrosystems AG A 8141 Schloss Premstatten, Austria T. +43 (0) 3136 500 0 F. +43 (0) 3136 525 01 info@austriamicrosystems.com
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